The present invention relates to network interfaces and, more specifically, to gateways connecting circuit networks and packet networks.
Currently, circuit switching technology forms the basis for the world-wide telecommunications network infrastructure and is used extensively in telephone systems, however the recent expansion of the Internet has fueled the use of packet-based technologies. Packet-based technologies can be used as an alternative or in combination with circuit switching technologies in these telecommunications networks and telephone systems. When packet-based and circuit-based communication technologies are used together, a bridge, known as a gateway, is necessary to transform and route signals between a circuit network and a packet network. Telephony gateways interconnecting to the circuit network may use standards-based time division multiplexed (TDM) trunks (T1, T3, E1, etc) and standards-based signaling mechanisms (e.g., Signaling System 7 or channel associated signaling). An example of a circuit network is the telephone system that provides subscribers with plain old telephone service (POTS). The gateway may interconnect to the packet network through standards-based packet interfaces such as Internet Protocol (IP), Frame Relay and Asynchronous Transfer Mode (ATM) over a variety of physical interfaces (e.g., 100BaseT, T3, OC3c, OC12c). An example of a packet network is the Internet.
FIG. 1 illustrates the architecture of a prior art telephony gateway 10. This gateway architecture uses a circuit switch fabric 12 such as a TDM bus or a Time-Slot-Interchange to provide the internal switching between the circuit network 14 and the packet network 16. Circuit-to-circuit calls, as indicated by line 15, are switched between circuit network servers 18 using the circuit switch fabric 12. Circuit-to-packet calls, as indicated by line 17, are switched between circuit network servers 18 and packet network servers 19 using this same circuit switch fabric 12. The conversion of the circuit data to packet data, which is known as packet adaptation, is performed in the packet network servers 19, which incorporate digital signal processors (not shown) for echo cancellation and transcoding. The circuit switch fabric 12, however, limits the overall flexibility of the gateway to move packets among server cards.
FIG. 2 illustrates the architecture of another prior art telephony gateway 20. For greater flexibility, this gateway architecture separates the signal processing functions from the packet network servers 22 and places these functions on signal processing servers 21. In addition, a packet switch fabric 23 allows connectivity from any signal processing server 21 to any packet network server 22. It is well known that a packet switch fabric 23 can be implemented with a variety of technologies, such as an arbitrated packet bus or a centralized switching module. As in the gateway architecture of FIG. 1, circuit-to-circuit calls are switched via the circuit switch fabric 12 as indicated by line 24. Circuit-to-packet calls, as indicated by line 25, are first switched by the circuit switch fabric 26 to a signal processing server 21 that contains an available digital signal processor (DSP) for performing signal processing. The signal processing server 21 uses the packet switch fabric 23 to move the processed information to a packet network server 22 and the associated packet network interface selected during call establishment. The separation of the signal processing function on separate servers allows a call-by-call selection of different DSP-based functions. For example, different calls can use different compression algorithms, with differing processing complexity, residing on different signal processing servers 22. While the flexibility of the packet switch fabric 23 represents an improvement over the architecture of FIG. 1, the architecture of FIG. 2 carries the cost and complexity burden of two separate and independent switch fabrics: one circuit and one packet.
The invention provides, in a preferred embodiment, a system for connecting a circuit network with a packet network. In one embodiment, the system contains a packet switch fabric, a circuit network server, a packet network server and a signal processing server. The circuit network server can send and receive circuit-based signals with the circuit network and can also send and receive packet-based signals with the packet switch fabric. The circuit network server has a digital signal processor which provides packet adaptation. The packet network server can send and receive packet-based signals with the packet switch fabric and can send and receive packet-based signals with the packet network. The signal processing server can send and receive packet-based signals with the packet switch fabric and has a digital signal processor for performing signal processing on the packet-based signals. The packet switch fabric transfers packet-based signals among the packet network server, the signal processing server, and the circuit network server.
In further embodiments, the digital signal processor of the circuit network server performs signal processing and it may also perform echo cancellation. In an alternative embodiment, the circuit network server may contain additional digital signal processors, wherein packet adaptation is performed on a circuit-based signal by a digital signal processor forming a packet-based signal prior to signal processing being performed on the packet-based signal. In another embodiment, the digital signal processor of the signal processing server performs transcoding and additionally, may perform echo cancellation.
In alternative embodiments, the packet switch fabric may be a switching module, a packet bus, or a cell bus.
In yet another embodiment, the system may further include a management server which is coupled to the packet switch fabric and provides management of gateway resources.
In a related embodiment in accordance with the invention, the circuit network server contains a line interface unit and a framer for interfacing with the circuit network and a packet bus interface for interfacing with the packet bus and distributing a packet-based signal to the packet bus. The packet bus interface may contain a multiplexer coupled to the digital signal processor for sending and receiving packets. In yet another related embodiment of the invention, the signal processing server contains a packet bus interface and a digital signal processor. The digital signal processor may be configured to transcode packet-based signals and the packet bus interface may contain a multiplexer. Other objects and advantages of the present invention will become apparent during the following description of the presently preferred embodiments of the present invention taken in conjunction with the drawings.